1. Technical Field
This invention is related to the field of integrated circuit implementation, and more particularly to the implementation of differential amplifier circuits.
2. Description of the Related Art
Computing systems may include one or more systems on a chip (SoC), which may integrate a number of different functions, such as graphics processing or audio processing, onto a single integrated circuit. With numerous functions included in a single integrated circuit, chip count may be kept low in mobile computing systems, such as tablets, for example, which may result in reduced assembly costs, and a smaller form factor for such mobile computing systems.
Extending battery life in these mobile computing systems continues to be a key goal for the manufacturers of these devices. One method for extending battery life is to reduce the internal operating voltage level of the SoCs. Reducing the operating voltage level may reduce the average power consumed by the SoC.
A drawback to reducing the operating voltage level of the SoCs is that differential signals used within many SoCs may be difficult to read. Differential signals are generally implemented as a pair of signals. The value of a data bit may be encoded as a difference between the voltage levels of each of the signals. To recover encoded data, a difference between the voltage levels of the signals may be amplified, and the value of the encoded data bit determined dependent upon the amplified difference. An advantage of differential signals may be that since the signals are measured against one another rather than measured against a set voltage threshold, smaller voltage swings between high and low values may be used. Smaller voltage swings may save power and/or allow for higher bit rates. Another advantage may be that differential signal may be more tolerant to supply noise if the supply noise is common to both signals in the pair of signals.
Differential amplifiers may be used to measure and read differential signals. However, some designs for differential amplifiers may have limited common mode input voltage ranges. A common mode voltage may refer to an average voltage level for a differential signal pair. In other words, a given differential signal pair may have a common mode voltage level of VCM such that the high signal may be VCM+30 mV and the low signal may be VCM−30 mV. As an example of a limited bandwidth design, a known differential amplifier may only be capable of reading inputs with common mode voltages in the range of 0.3V to the operating voltage of the circuit. As the input signals approach a common mode voltage level of 0.3V, the differential amplifier may have more trouble resolving the bit values to reach a result. As a result, the amplifier may take longer to resolve the bit values and at a certain point, may not be capable of reaching a result which may cause data transmission errors and potentially failure of the system at a desired frequency of operation. As operating voltages are reduced to conserve power, the input bandwidth of traditional differential amplifier designs may be reduced.
Therefore, a new differential amplifier design is desired to extend the input bandwidth to allow for lower operating voltages. However, the new design must be power efficient so that power savings from lowering the operating voltage are not negated by increased power consumption of the differential amplifier.